Many modern electronic systems involve analog-to-digital converters (ADCs) and/or digital-to-analog converters (DACs). One example ADC topology is referred to as top plate sampling ADC topology. In a top plate sampling ADC topology, an input signal is sampled using a capacitor having a first node coupled to a sampling switch and a second node coupled to ground which is then quantized by one or more pipeline stages. In a top plate sampling ADC topology, the stage one circuitry (e.g., a flash stage) receives a full-scale input exposing it to reliability issues. The performance (speed, power etc.) of stage one components, such as a flash stage comparator, is constrained by reliability requirements. Efforts to improve ADC design and performance are ongoing.